Purnendu Kumar's CV
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\name{Purnendu}{Kumar}
\title{MSEE Application and Instrumentation} % optional, remove / comment the line if not wanted
\address{Ward 07, Mangrauni North}{Madhubani, 847211}{India}% optional, remove / comment the line if not wanted; the "postcode city" and "country" arguments can be omitted or provided empty
\phone[mobile]{+91~9791271274} % optional, remove / comment the line if not wanted; the optional "type" of the phone can be "mobile" (default), "fixed" or "fax"
%\phone[fixed]{+2~(345)~678~901}
%\phone[fax]{+3~(456)~789~012}
\email{purnenduk90@gmail.com} % optional, remove / comment the line if not wanted
\homepage{satakshi.in/purnendu} % optional, remove / comment the line if not wanted
\social[linkedin]{purnenduk90} % optional, remove / comment the line if not wanted
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\quote{Best way to predict the future is to create it.} % optional, remove / comment the line if not wanted
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\begin{document}
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%----- resume ---------------------------------------------------------
\makecvtitle
\section{Education}
\cventry{2014--2017}{MS by Research}{Indian Institute of Technology Madras}{Chennai}{\textit{8.47}}{Analog circuit, High speed design, Instrumentation for Particle detector} % arguments 3 to 6 can be left empty
\cventry{2009--2013}{BE}{G H R C E}{Nagpur}{\textit{73.09\%}}{Electrical Engineering, Electronics and Power}
\section{Master thesis}
\cvitem{title}{\emph{Design and characterization of discrete analog front-end for resistive plate chamber (RPC) detector}}
\cvitem{supervisors}{Dr. Aniruddhan Sankaran, Dr. Anil Prabhakar}
\cvitem{description}{Resistive Plate Chamber (RPC) detector gives nanosecond electrical pulses with a few millivolts of amplitude at 50 Ohm termination impedance. For accurate timing data abstraction using a precision TDC, it is required to have a very accurate front-end with lowest possible time-walk and jitter in the output signal. Thesis emphasis on design of high gain broadband amplifier, and to characterize CFD with varying delays to get best possible slope on both rising edge and falling edge of signal for precision time measurement. A 0.35 ns improvement over 1.55ns of leading edge discriminator was obtained by use of ARCD topology and ac coupling for fast return to zero.}
\section{Experience}
\subsection{Regular}
\cventry{2014--2017}{Project Associate}{IIT Madras}{Dept. of Physics}{Chennai}{Instrumentation for INO project.\newline{}%
Achievements:%
\begin{itemize}%
\item Update of RPC-DAQ schematic for switched power supply.
\item Test methodology development for RPC Test-jig, Pin-Assignment for FPGA, and schematic design.
\item Design of LC ladder based sub-nanosecond stepped electronically controlled delay circuit.
\end{itemize}}
\cventry{2013--2014}{Junior Research Fellow}{University of Delhi}{Dept. of Physics and Astrophysics}{Delhi}{RPC Electrode characterization for INO Project\newline{}
Achievements:
\begin{itemize}
\item Programming CAEN VME data acquisition system.
\item Assembly of Plastic scintillator with photo-multiplier tube and characterization.
\item Assembly and characterization of multiple glass and bakelite RPC.
\end{itemize}}
\subsection{Vocational}
\cventry{Nov. 2011}{Intern}{Patratu Thermal Power Station}{Pataratu}{Jharkhand}{Transformers, switching stations}
\cventry{Nov. 2010}{Intern}{Bharti Airtel Limited}{Patna}{Bihar}{Power management at tower site, centralized failure monitoring}
\section{Languages}
\cvitemwithcomment{C}{Intermediate}{2010 - Present, GCC, C99}
\cvitemwithcomment{Python}{Intermediate}{2014 - Present, Spyder IDE}
\cvitemwithcomment{Verilog}{Intermediate}{2015 - Present, DSP Architecture optimization, VLSI Lab}
\cvitemwithcomment{C++}{Basic}{NIIT certification 2010, Visual CPP, QT, G++, C++11}
\cvitemwithcomment{HTML,PHP}{Basic}{2015 - Present (satakshi.in)}
\section{Computer skills}
\cvdoubleitem{EDA}{Allegro, Eagle, KiCad}{Application}{MATLAB}
\cvdoubleitem{Device Simulation}{Virtuoso-IC, Vivado, Quartus}{Circuit Simulation}{Spice Opus, NGSpice, LTSpice}
\cvdoubleitem{CAD}{Wings3D, Sketch-up}{Documentation}{MS Office, Libre Office, tex}
\section{Interests}
\cvitem{Blogging}{blog.satakshi.in}
\cvitem{Circuit design}{EEZ-PSU hardware issue debugging (github)}
\cvitem{Coding}{Active on Hacker Rank (Algorithm challenge)}
\section{Co Curricular}
\cventry{Workshop}{MATLAB based Image Processing}{by MagicMan Technologies}{Mumbai}{06-2012}{Design of MATLAB based line/object/gesture follower robot}
\section{Extra Curricular}
\cvlistitem{Hovercraft design competition finalist at kshitij-2011 (IIT Kharagpur).}
\cvlistitem{Co-ordinator at EPICS-2011, G H R C E, Nagpur.}
\cvlistitem{Represented R. K. College, Madhubani in inter college table-tennis tournament (L. N. M. University,
Darbhanga, Bihar) 2006.}
\section{References}
\begin{cvcolumns}
\cvcolumn{IITM}{\begin{itemize}\item Dr. Anil P.\item Dr. Aniruddhan S.\item Dr. P.K.Behera\end{itemize}}
\cvcolumn{DU}{\begin{itemize}\item Dr. Md. Naimuddin, \item Dr. Ashok K.\end{itemize}}
\cvcolumn[0.4]{All the rest \& some more}{\textit{Dr. S.B.Bodke (GHRCE)}, and \textit{Dr. Satyanarayna B. (TIFR)} }
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